Open Source Code

As the development of this project advances, our open source platform will gradually provide functional simulators and performance simulators, and provide descriptions of basic instructions and references to infrastructure. The current open source version provides an function simulator, and builds benchmarks for GPGPU basic functions based on some open source benchmarks.

Code Link

• github.com/SJTU-ACA-Lab/blue-porcelain

Publish Plan

Simulator	Description	Already Published
Function Simulator	Function simulator In the instruction set architecture (ISA) ISA interpreter, used to ensure the correct and accurate simulation of each instruction in the target instruction set of the target system, but does not provide any cycle accurate information.
Performance Simulator	The performance simulator is a clock-level simulator. It builds a complete microprocessor pipeline in software. On the basis of ensuring that the instruction set architecture is correct, it simulates the pipeline in the processor microstructure, taking into account of memory access delays.

Benchmarks	Description	Already Published
Basic	It mainly involves some basic parallel algorithms, including matrix, vector operations, reduction, summation, sorting algorithms,etc.
Advanced	It mainly involves complex algorithms in the fields of image processing, high-performance computing, and machine learning, including some Rodinia's benchmarks, Pytorch operators, and neural network models, etc.

The success of GPGPU is mainly due to the hardware structure that can efficiently execute the SIMT model and the software ecology with rich operator and development library resources. The two complement each other, forming a virtuous circle, and building the advantages of GPGPU in heterogeneous computing and neural network computing.

This project plans to build an open source general-purpose computing chip (GPGPU) platform. By providing a reasonable hardware architecture description and a complete simulator simulation tool, it provides support for a variety of neural network operators and rich general-purpose computing scenarios, so as to conform to the architecture. The described GPGPU design and implementation can be better integrated into the thriving existing GPGPU ecosystem.

The openness of the platform will provide a platform for learning and communication for fans of GPGPU application development and architecture researchers. In the future, we will continue to optimize the GPGPU architecture, update the simulator version, and support the construction of a more complete advanced test set. This part of the code needs to be obtained by contacting us separately.